product: slimline ? pci express ? to pci reversible bridge part numbers: pi7c9x111sl product description the pi7c9x111sl is the latest addition to pericom?s pci express ? bridge slimline? family of solutions. with the pi7c9x111sl, users can expect a x1 pci express to 32bit/66mhz pci reversible bridge with high performance, very low power consumption, and a small footprint. pi7c9x111sl offers the most effective forward & reverse bridging solution to platforms with high bandwidth requirement. the typical usage for this device is high volume applications requiring a ?bridge? from legacy pci products to new pci express based systems, or applications requiring a ?bridge? from new pci express based devices to legacy pci systems. the pi7c 9x111sl is a versatile device that can be used in applicatio ns including desktops, graphics cards, combo cards, pc peripherals, mfp printer and video surveillance systems. industry specifications compliance ? pci express base specification , rev. 1.1 ? pci express cem specification , rev. 1.0a ? pci express to pci/pci-x bridge specification , rev. 1.0 ? pci-to-pci bridge architecture specification , rev. 1.2 ? pci local bus specification , rev. 3.0 ? pci hot-plug specification , rev. 1.1 ? pci shpc and subsystem specification , rev. 1.0 ? pci mobile design guide , version 1.1 ? system management (sm) bus, version 2.0 ? pci bus pm interface specification , rev. 1.1 ? advanced configuration and power interface specification , rev. 2.0 special features ? fully reversible o forward ? pcie primary, pci secondary o reverse ? pci primary, pcie secondary ? maximum payload size ? up to 512 bytes ? ultra low power modes o critical for mobile applications ? support for up to 4 pci bus masters ? two level internal arbitration ? gpio support 4 dedicated bi-directional ? typical power: < 460mw ? when external arbiter is used: o 4 additional outputs o 4 additional inputs ? masquerade support o user defined vendor, device, revision, subsystem device, and subsystem vendor id ? large 10kb buffer o 4kb for upstream reads, 2kb for downstream reads & 2kb for writes per port ? access to extended configuration registers from pci side in reverse mode ? tiny 14 x 14mm, 128-pin qfp package pci express features ? virtual isochronous support o upstream tc 1 ? 7 generation o downstream tc 1 ? 7 mapping ? 16-bit crc, lcrc (32-bit) ? ecrc and advanced error reporting ? error forwarding (data poisoning) ? lane reversal (polarity toggle) ? vddaux support (1.0v) pci features ? 3.3v signaling with 5v i/o tolerance ? pme# support ? 16-bit address decode for vga ? vaux support (3.3v) ? hot plug support ? subsystem device and subsystem vendor id ? msi and int support ? sm bus o phy, data link, network layer, pec, arp, etc. ? i2c serial eeprom support application example 32bit / 66mhz pci chipset x1 pcie pericom semiconductor www.pericom.com pci express?, pcie?, and pci-x? are all r egistered trademarks of pci-sig? - pcisig.org page 1 of 1 rev 1.1 ? 2008
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